Marvell Demonstrates Industry-Leading 3nm PCIe Gen 7 Connectivity for Accelerated Infrastructure at OCP 2024

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Extends PAM4 Connectivity Leadership to Scale Next Generation AI Server Compute Fabrics

SANTA CLARA, Calif., Oct. 15, 2024 /PRNewswire/ -- OCP Global SummitMarvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, demonstrates its industry-leading 3nm PCIe Gen 7 connectivity at the OCP Global Summit, October 15-17, at the San Jose Convention Center.  PCIe Gen 7 doubles data transfer speeds, enabling continued scaling of compute fabrics inside accelerated server platforms, general-purpose servers, CXL systems and disaggregated infrastructure. Building on its widely deployed PAM4 technology and utilizing its industry-leading accelerated infrastructure silicon platform, Marvell has developed the industry's most comprehensive interconnect portfolio addressing all high-bandwidth optical and copper connections in AI data centers. This innovative portfolio empowers cloud data center operators to optimize their infrastructure for their specific architectures and workloads to meet the exponential demands of AI.

Marvell pioneered PAM4 technology over a decade ago and leads the industry in PAM4 interconnect shipments. Today, most of the optical interconnects used in data center backend and frontend networks are based on PAM4 technology. As compared to PCIe Gen 5, which was based on NRZ modulation, PCIe Gen 6 and 7 require the use of PAM4 modulation. With its recent PCIe Gen 6 retimer announcement and this PCIe Gen 7 demonstration, Marvell extends its industry-leading PAM4-based optical and copper interconnect portfolio beyond Ethernet and InfiniBand into copper and optical PCIe, CXL and proprietary compute fabric links.

The increasing performance of processors and accelerators combined with the growing size of AI clusters is prompting the need for greater bandwidth speed and capacity. PCIe Gen 7 will enable larger volumes of data to be exchanged between processors to reduce the cost, time and energy required for training or inference. PCIe is the industry standard for inside-server-system connections between CPUs, GPUs, AI accelerators, and other server components. AI models are doubling their computation requirements every six months and are now the primary driver of the PCIe roadmap, with PCIe Gen 7 becoming a requirement.

"AI workloads are driving the evolution of server interconnects, and our PCIe Gen 7 technology is engineered to meet the performance and scalability needs of next-generation AI data centers," said Venu Balasubramonian, vice president of product marketing, Connectivity Business Unit at Marvell. "Our leadership in PAM4 SerDes technology in advanced process nodes enables us to deliver superior performance, low latency, and industry-leading performance, power and latency, providing a critical foundation for accelerated infrastructure."